mulAddRecFN

in hardfloat_sys

extern entity mulAddRecFN<#uint expWidth, #uint sigWidth>(
    control: uint<1>,
    op: uint<2>,
    a: uint<{expWidth + sigWidth + 1}>,
    b: uint<{expWidth + sigWidth + 1}>,
    c: uint<{expWidth + sigWidth + 1}>,
    roundingMode: uint<3>,
    out: inv &uint<{expWidth + sigWidth + 1}>,
    exceptionFlags: inv &uint<5>
);

Description taken from the Berkeley Hardfloat documentation:

Implements fused multiply-add as defined by the IEEE Floating-Point Standard. When op = 0, the module computes (a × b) + c with a single rounding. If one of the multiplication operands a and b is infinite and the other is zero, the invalid exception is indicated even if operand c is a quiet NaN. The bits of input op affect the signs of the addends, making it possible to turn addition into subtraction (much like the subOp input to addRecFN). The exact effects of op are summarized in this table:

op[1]    op[0]    Function
0        0        (a × b) + c
0        1        (a × b) − c
1        0        c − (a × b)
1        1        −(a × b) − c

In all cases, the function is computed with only a single rounding, of course.